Digital Design : Making a 32 bit Adder/Subtractor in Logisim

32 Bit Adder/Subtractor

 Explanation of the circuit.

 First 

Full Adder Circuit in Logisim

We need to make a Full Adder circuit. Truth-table for the same is:

A	B	C	CARRY	SUM
0	0	0	0	0
0	0	1	0	1
0	1	0	0	1
0	1	1	1	0
1	0	0	0	1
1	0	1	1	0
1	1	0	1	0
1	1	1	1	1

Boolean Expression in the SOP form is:

1.) For Sum : S = (A+B)C’ + (A XOR B)C

2.) For Carry : CARRY = AC + B(A XNOR C)

Hence, 1-bit Full Adder circuit is made.

Now we have to made 32-bit Adder/Subtractor circuit but placing 1-bit FA 32 times is bit complicated and requires more space.

Alternative solution for the same is to first, make a 4-bit Adder using FA, then make 16-bit Adder using ‘4-Bit Adder’ And finally making 32-Bit Adder/Subtractor using 2 “16-Bit Adder” circuit.

·       4-Bit Adder Circuit :-

In the above 4-bit Adder circuit, we are joining C_in input from the 1^st FA to 2^nd FA and so on and finally to the C_out. Also, each FA requires 1-bit input at A and B, So we used Splitter that takes 4-bit input and distribute each bit to the required FA.

Here “Overflow” happens when at the MSB [4^th digit] summation there will be a carry generated and the whole answer would be of 5-bit but the output is of 4-bit only. Hence, we have C_out output at the end so that it “detects Overflow”.

Now, similarly we make 16-Bit Adder using the above 4-bit circuit.

·       16 – Bit Adder Circuit :-

[Same as the 4-Bit Adder Circuit].

Here A and B both have the MSB as 1 and the C_out has the value 1 that shows that the circuit has “Overflow”. Also notice that the 9^th digit carry is shown in the SUM showing that Adder is working fine.

Now Finally.....

·       32-Bit Adder/Subtractor Circuit :-

Now, for making 32-bit Adder/Subtractor we need to make some changes in the circuit. Usually when we make 4-bit Adder we are getting range of [0,15] numbers in decimal no system. However when we make a substractor the range changes to [-8,7].

This happens because for making a subtractor, we need to get the 1’s complement of the B. Example, 8 – 4 = 8 + (-4). Comparing it with A + (-B), we need the complement of B. For that we add XOR gate to the input of the B and Cin and the output is given to the FA’s 2^nd output.

 The following figure shows the Circuit in subtraction mode,

Where user has to set the C_in as 1 to do subtraction of the numbers.

However, here C_out showing 1 doesn’t mean “Overflow.” Here,

FA2 means the previous 16-Bit Adder circuit. We are also using “Bit Extender” with sign mode so that when C_in is at 1 it will give the result at XOR gate as 1 also and vice-versa.

ð Notice that in subtraction, If the answer is negative than we have to make the 2’s complement of the answer in order to get the real one.

Q-) What is Overflow?

Ans – The condition that occurs when a calculation precedes a result that is greater in the magnitude than that which a storage location cannot store is called “Overflow”.

Here, overflow occurs if there are not enough bits to represent the correct result.

Example, For

4-bit Adder we are getting range of [0,15] numbers in decimal no system. However when we make a subtractor the range changes to [-8,7].



* Thank you visiting this site.
* If you really liked this, then go for the like and follow. :)
* Feel free to give any comment/suggestion regarding the content or the blog.